00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 15. July 2011 00005 * $Revision: V1.0.10 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_scale_q7.c 00009 * 00010 * Description: Multiplies a Q7 vector by a scalar. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Version 1.0.10 2011/7/15 00015 * Big Endian support added and Merged M0 and M3/M4 Source code. 00016 * 00017 * Version 1.0.3 2010/11/29 00018 * Re-organized the CMSIS folders and updated documentation. 00019 * 00020 * Version 1.0.2 2010/11/11 00021 * Documentation updated. 00022 * 00023 * Version 1.0.1 2010/10/05 00024 * Production release and review comments incorporated. 00025 * 00026 * Version 1.0.0 2010/09/20 00027 * Production release and review comments incorporated 00028 * 00029 * Version 0.0.7 2010/06/10 00030 * Misra-C changes done 00031 * -------------------------------------------------------------------- */ 00032 00033 #include "arm_math.h" 00034 00059 void arm_scale_q7( 00060 q7_t * pSrc, 00061 q7_t scaleFract, 00062 int8_t shift, 00063 q7_t * pDst, 00064 uint32_t blockSize) 00065 { 00066 int8_t kShift = 7 - shift; /* shift to apply after scaling */ 00067 uint32_t blkCnt; /* loop counter */ 00068 00069 #ifndef ARM_MATH_CM0 00070 00071 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00072 q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */ 00073 00074 00075 /*loop Unrolling */ 00076 blkCnt = blockSize >> 2u; 00077 00078 00079 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00080 ** a second loop below computes the remaining 1 to 3 samples. */ 00081 while(blkCnt > 0u) 00082 { 00083 /* Reading 4 inputs from memory */ 00084 in1 = *pSrc++; 00085 in2 = *pSrc++; 00086 in3 = *pSrc++; 00087 in4 = *pSrc++; 00088 00089 /* C = A * scale */ 00090 /* Scale the inputs and then store the results in the temporary variables. */ 00091 out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8)); 00092 out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8)); 00093 out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8)); 00094 out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8)); 00095 00096 /* Packing the individual outputs into 32bit and storing in 00097 * destination buffer in single write */ 00098 *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4); 00099 00100 /* Decrement the loop counter */ 00101 blkCnt--; 00102 } 00103 00104 /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 00105 ** No loop unrolling is used. */ 00106 blkCnt = blockSize % 0x4u; 00107 00108 while(blkCnt > 0u) 00109 { 00110 /* C = A * scale */ 00111 /* Scale the input and then store the result in the destination buffer. */ 00112 *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8)); 00113 00114 /* Decrement the loop counter */ 00115 blkCnt--; 00116 } 00117 00118 #else 00119 00120 /* Run the below code for Cortex-M0 */ 00121 00122 /* Initialize blkCnt with number of samples */ 00123 blkCnt = blockSize; 00124 00125 while(blkCnt > 0u) 00126 { 00127 /* C = A * scale */ 00128 /* Scale the input and then store the result in the destination buffer. */ 00129 *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8)); 00130 00131 /* Decrement the loop counter */ 00132 blkCnt--; 00133 } 00134 00135 #endif /* #ifndef ARM_MATH_CM0 */ 00136 00137 } 00138